Isaac Scientific Publishing

Frontiers in Signal Processing

Fast Median Filter Image Processing Algorithm and Its FPGA Implementation

Download PDF (960 KB) PP. 88 - 94 Pub. Date: October 1, 2020

DOI: 10.22606/fsp.2020.44002


  • Biaobiao Wang
    College of Electrical & Information Engineering, Southwest Minzu University, Chengdu 610041, China
  • Qiang Xiang*
    College of Electrical & Information Engineering, Southwest Minzu University, Chengdu 610041, China


Aiming at the difficulty of real-time and high-speed processing of the filtering process using software methods in image preprocessing, a fast median filtering algorithm based on FPGA is designed using the parallel processing capability of field programmable gate array (FPGA). Compared with the traditional median filtering algorithm, it has a great improvement, reducing the number of data comparisons and improving the processing speed. From the results of the Matlab and Modelsim joint simulation experiments, it can be seen that the filtering algorithm has a good filtering effect and can be fast, Efficiently filter the image, which helps to improve the quality of image processing.


field programmable gate array (FPGA), fast median filer, image processing, pipeline.


[1] Hu Xuelong, Xu Kaiyu. Digital Image Processing. Beijing: Electronic Industry Press, 2014.

[2] Chang JJ. Modified 2D median filter for impulse noise suppression in a real-time system. IEEE Trans. on Consumer Electronics, 2005, 41(1):73-80.

[3] Wen Qiang, Hou Yongyan. Digital Image Processing. Xi’an: Xidian University Press, 2009.

[4] Hu Hongwei. Research on FPGA-based image edge detection system [D]. Harbin Institute of Technology, 2017.

[5] Xia Liangzheng. Digital Image Processing [M]. Nanjing: Southeast University Press, 1999:154-160.

[6] Wen K L,Burgess N.Listless zerotree coding for color image[C]//Proceedings of the 32nd Asilomar Conference on Signals,System and Computers,1998:231-235.

[7] Gonzalez R C, Woods R E, Eddins S L. Digital Image Processing Using Matlab[M]. Ruan Qiuqi, Trans. Beijing: Publishing House of Electronics Industry, 2006.

[8] Xu, Q.; Varadarajan, S.; Chakrabarti, C.; Karam, L.J.A distributed canney edge detector: Algorithm and FPGA implementation[J]. IEEE Transactions on Image Processing, 2014, Vol.23, No.7, 2944-2960.